A Flow Graph Formulation of Optimal Software Pipelining

نویسندگان

  • Dirk Fimmel
  • Jan Müller
چکیده

We present a new approach to the loop scheduling problem, which excels previous solutions in two important aspects: The resource constraints are formulated using flow graphs, and the initiation interval is treated as a rational variable. The approach supports heterogeneous processor architectures and pipelined functional units, and the Integer Linear Programming implementation produces an optimum loop schedule, whereby a minimum is achieved. Our flow graph model facilitates the cyclic binding of loop operations to functional units. Compared to previous research results, the solution can provide faster loop schedules and a significant reduction of the problem complexity and solution time.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Regular Stream Flow Graphs 42 . 1 Operational Model of Regular Stream Flow

In this paper, we present a novel framework of multi-rate scheduling of signal processing programs represented by regular stream ow graphs (RSFGs). The main contribution of this paper is translating the scheduling problem of RSFGs into an equivalent problem in the domain of Karp-Miller computation graphs. A distinct feature of our scheduling framework | called multi-rate software pipelining | i...

متن کامل

Time Optimal Software Pipelining of Loops with Control Flows for VLIW Processors

Software pipelining is widely used as a compiler optimization technique to achieve high performance in machines that exploit instruction-level parallelism such as superscalar or VLIW processors. However, surprisingly, there have been few theoretical results on the optimality of software pipelined loops with control flows. The problem of time optimal software pipelining of loops with control flo...

متن کامل

SIRA: Schedule Independent Register Allocation for Software Pipelining

The register allocation in loops is generally carried out after or during the software pipelining process. This is because doing the register allocation at first step without assuming a schedule lacks the information of interferences between values live ranges. The register allocator introduces extra false dependencies which reduces dramatically the original ILP (Instruction Level Parallelism)....

متن کامل

SCAN: A Heuristic for Near-Optimal Software Pipelining

Software pipelining is a classic compiler optimization that improves the performances of inner loops on instruction-level parallel processors. In the context of embedded computing, applications are compiled prior to manufacturing the system, so it is possible to invest large amounts of time for compiler optimizations. Traditionally, software pipelining is performed by heuristics such as iterati...

متن کامل

Software Pipelining for the Pegasus IR

Modern processors, especially VLIW processors, often have the ability to execute multiple instructions simultaneously. Taking advantage of this capability is crucial for high performance software applications. Software pipelining is a technique designed to increase the level of parallelism in loops. We propose a new approach to software pipelining based on direct manipulations of control flow g...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2002